Address Modes:

A .... Accumulator OPC A operand is AC
abs .... absolute OPC $HHLL operand is address $HHLL
abs,X .... absolute, X-indexed OPC $HHLL,X operand is address incremented by X with carry
abs,Y .... absolute, Y-indexed OPC $HHLL,Y operand is address incremented by Y with carry
# .... immediate OPC #$BB operand is byte (BB)
impl .... implied OPC operand implied
ind .... indirect OPC ($HHLL) operand is effective address; effective address is value of address
X,ind .... X-indexed, indirect OPC ($BB,X) operand is effective zeropage address; effective address is byte (BB) incremented by X without carry
ind,Y .... indirect, Y-indexed OPC ($LL),Y operand is effective address incremented by Y with carry; effective address is word at zeropage address
rel .... relative OPC $BB branch target is PC + offset (BB), bit 7 signifies negative offset
zpg .... zeropage OPC $LL operand is of address; address hibyte = zero ($00xx)
zpg,X .... zeropage, X-indexed OPC $LL,X operand is address incremented by X; address hibyte = zero ($00xx); no page transition
zpg,Y .... zeropage, Y-indexed OPC $LL,Y operand is address incremented by Y; address hibyte = zero ($00xx); no page transition


Instructions by Name:

ADC .... add with carry
AND .... and (with accumulator)
ASL .... arithmetic shift left
BCC .... branch on carry clear
BCS .... branch on carry set
BEQ .... branch on equal (zero set)
BIT .... bit test
BMI .... branch on minus (negative set)
BNE .... branch on not equal (zero clear)
BPL .... branch on plus (negative clear)
BRK .... interrupt
BVC .... branch on overflow clear
BVS .... branch on overflow set
CLC .... clear carry
CLD .... clear decimal
CLI .... clear interrupt disable
CLV .... clear overflow
CMP .... compare (with accumulator)
CPX .... compare with X
CPY .... compare with Y
DEC .... decrement
DEX .... decrement X
DEY .... decrement Y
EOR .... exclusive or (with accumulator)
INC .... increment
INX .... increment X
INY .... increment Y
JMP .... jump
JSR .... jump subroutine
LDA .... load accumulator
LDY .... load X
LDY .... load Y
LSR .... logical shift right
NOP .... no operation
ORA .... or with accumulator
PHA .... push accumulator
PHP .... push processor status (SR)
PLA .... pull accumulator
PLP .... pull processor status (SR)
ROL .... rotate left
ROR .... rotate right
RTI .... return from interrupt
RTS .... return from subroutine
SBC .... subtract with carry
SEC .... set carry
SED .... set decimal
SEI .... set interrupt disable
STA .... store accumulator
STX .... store X
STY .... store Y
TAX .... transfer accumulator to X
TAY .... transfer accumulator to Y
TSX .... transfer stack pointer to X
TXA .... transfer X to accumulator
TXS .... transfer X to stack pointer
TYA .... transfer Y to accumulator


Registers:

PC .... program counter (16 bit)
AC .... accumulator (8 bit)
X .... X register (8 bit)
Y .... Y register (8 bit)
SR .... status register [NV-BDIZC] (8 bit)
SP .... stack pointer (8 bit)

SR Flags (bit 7 to bit 0):

N .... Negative
V .... Overflow
- .... ignored
B .... Break
D .... Decimal (use BCD for arithmetics)
I .... Interrupt (IRQ disable)
Z .... Zero
C .... Carry


Processor Stack:
LIFO, top down, 8 bit range, 0x0100 - 0x01FF


Bytes, Words, Addressing:
8 bit bytes, 16 bit words in lobyte-hibyte representation (Little-Endian).
16 bit address range, operands follow instruction codes.


Vendor:
MOS Technology, 1975